diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-10-11 14:27:05 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-10-26 18:27:41 -0700 |
| commit | 36971566ea7a519bcde1830f39b6aa37c34e0fb4 (patch) | |
| tree | 5e2bc834ef97c1b35b5ecce1cf7a01bc4c377cba /drivers/clk/at91/pmc.h | |
| parent | c405f5c15e9f6094f2fa1658e73e56f3058e2122 (diff) | |
clk: at91: re-factor clocks suspend/resume
SAMA5D2 and SAMA7G5 have a special power saving mode (backup mode) where
most of the SoC's components are powered off (including PMC). Resuming
from this mode is done with the help of bootloader. Peripherals are not
aware of the power saving mode thus most of them are disabling clocks in
proper suspend API and re-enable them in resume API without taking into
account the previously setup rate. Moreover some of the peripherals are
acting as wakeup sources and are not disabling the clocks in this
scenario, when suspending. Since backup mode cuts the power for
peripherals, in resume part these clocks needs to be re-configured.
The initial PMC suspend/resume code was designed only for SAMA5D2's PMC
(as it was the only one supporting backup mode). SAMA7G supports also
backup mode and its PMC is different (few new functionalities, different
registers offsets, different offsets in registers for each
functionalities). To address both SAMA5D2 and SAMA7G5 PMC add
.save_context()/.resume_context() support to each clocks driver and call
this from PMC driver.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-2-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/pmc.h')
| -rw-r--r-- | drivers/clk/at91/pmc.h | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index a49076c804a9..45df094498ce 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -13,6 +13,8 @@ #include <linux/regmap.h> #include <linux/spinlock.h> +#include <dt-bindings/clock/at91.h> + extern spinlock_t pmc_pcr_lock; struct pmc_data { @@ -98,6 +100,20 @@ struct clk_pcr_layout { u32 pid_mask; }; +/** + * struct at91_clk_pms - Power management state for AT91 clock + * @rate: clock rate + * @parent_rate: clock parent rate + * @status: clock status (enabled or disabled) + * @parent: clock parent index + */ +struct at91_clk_pms { + unsigned long rate; + unsigned long parent_rate; + unsigned int status; + unsigned int parent; +}; + #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) @@ -248,12 +264,4 @@ struct clk_hw * __init at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name, const char *parent_name); -#ifdef CONFIG_PM -void pmc_register_id(u8 id); -void pmc_register_pck(u8 pck); -#else -static inline void pmc_register_id(u8 id) {} -static inline void pmc_register_pck(u8 pck) {} -#endif - #endif /* __PMC_H_ */ |