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authorMichael Turquette <mturquette@baylibre.com>2015-06-19 07:37:14 -0700
committerMichael Turquette <mturquette@baylibre.com>2015-06-19 07:37:14 -0700
commit909aa10e6d6a9524f95dadb6b3ded1c38ec34e11 (patch)
tree5fb10cd60e0b3c0b2372e1aed143305b32fe3888 /drivers/clk/at91/clk-pll.c
parent0f57d86787d8b1076ea8f9cbdddda2a46d534a27 (diff)
parent28df9c2fb6f896179fcffd5a3f5a86e2d1dff0a5 (diff)
Merge branch 'ccf/atmel-fixes-for-4.1' of https://github.com/bbrezillon/linux-at91 into clk-fixes
Diffstat (limited to 'drivers/clk/at91/clk-pll.c')
-rw-r--r--drivers/clk/at91/clk-pll.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index 6ec79dbc0840..cbbe40377ad6 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -173,8 +173,7 @@ static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate,
int i = 0;
/* Check if parent_rate is a valid input rate */
- if (parent_rate < characteristics->input.min ||
- parent_rate > characteristics->input.max)
+ if (parent_rate < characteristics->input.min)
return -ERANGE;
/*
@@ -187,6 +186,15 @@ static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate,
if (!mindiv)
mindiv = 1;
+ if (parent_rate > characteristics->input.max) {
+ tmpdiv = DIV_ROUND_UP(parent_rate, characteristics->input.max);
+ if (tmpdiv > PLL_DIV_MAX)
+ return -ERANGE;
+
+ if (tmpdiv > mindiv)
+ mindiv = tmpdiv;
+ }
+
/*
* Calculate the maximum divider which is limited by PLL register
* layout (limited by the MUL or DIV field size).