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authorMika Westerberg <mika.westerberg@linux.intel.com>2023-09-25 11:05:38 +0300
committerDamien Le Moal <dlemoal@kernel.org>2023-10-03 09:59:15 +0900
commitb8b8b4e0c052b2c06e1c4820a8001f4e0f77900f (patch)
tree7e46c95644125d45c07dafe72f95dcf26fff6865 /drivers/ata
parent1b947279798fd51bef46e8241102f5b896add021 (diff)
ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
Intel Alder Lake-P AHCI controller needs to be added to the mobile chipsets list in order to have link power management enabled. Without this the CPU cannot enter lower power C-states making idle power consumption high. Cc: Koba Ko <koba.ko@canonical.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/ahci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 99b3d3e60774..3a5f3255f51b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -423,6 +423,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
/* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
{ PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
+ { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,