diff options
author | Sachin Kamat <sachin.kamat@linaro.org> | 2014-01-02 08:39:31 +0530 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2014-01-02 07:44:57 -0500 |
commit | 15e5318c9cb92dc49f1326bce44798575e3b5774 (patch) | |
tree | 16a321bdd30f80ad0e7af610357b3c29837e8c52 /drivers/ata/pata_samsung_cf.c | |
parent | 96f7f6bd855cc47988e3efb1efc4926404ae6f60 (diff) |
ata: pata_samsung_cf: Merge pata_samsung_cf.h into pata_samsung_cf.c
Since pata_samsung_cf.h is referenced only by pata_samsung_cf.c, merge
it into the .c file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata/pata_samsung_cf.c')
-rw-r--r-- | drivers/ata/pata_samsung_cf.c | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c index e04d70b7ce76..cd2746b169a9 100644 --- a/drivers/ata/pata_samsung_cf.c +++ b/drivers/ata/pata_samsung_cf.c @@ -24,11 +24,47 @@ #include <linux/slab.h> #include <linux/platform_data/ata-samsung_cf.h> -#include "pata_samsung_cf.h" #define DRV_NAME "pata_samsung_cf" #define DRV_VERSION "0.1" +#define S3C_CFATA_REG(x) (x) +#define S3C_CFATA_MUX S3C_CFATA_REG(0x0) +#define S3C_ATA_CTRL S3C_CFATA_REG(0x0) +#define S3C_ATA_STATUS S3C_CFATA_REG(0x4) +#define S3C_ATA_CMD S3C_CFATA_REG(0x8) +#define S3C_ATA_SWRST S3C_CFATA_REG(0xc) +#define S3C_ATA_IRQ S3C_CFATA_REG(0x10) +#define S3C_ATA_IRQ_MSK S3C_CFATA_REG(0x14) +#define S3C_ATA_CFG S3C_CFATA_REG(0x18) + +#define S3C_ATA_MDMA_TIME S3C_CFATA_REG(0x28) +#define S3C_ATA_PIO_TIME S3C_CFATA_REG(0x2c) +#define S3C_ATA_UDMA_TIME S3C_CFATA_REG(0x30) +#define S3C_ATA_XFR_NUM S3C_CFATA_REG(0x34) +#define S3C_ATA_XFR_CNT S3C_CFATA_REG(0x38) +#define S3C_ATA_TBUF_START S3C_CFATA_REG(0x3c) +#define S3C_ATA_TBUF_SIZE S3C_CFATA_REG(0x40) +#define S3C_ATA_SBUF_START S3C_CFATA_REG(0x44) +#define S3C_ATA_SBUF_SIZE S3C_CFATA_REG(0x48) +#define S3C_ATA_CADR_TBUF S3C_CFATA_REG(0x4c) +#define S3C_ATA_CADR_SBUF S3C_CFATA_REG(0x50) +#define S3C_ATA_PIO_DTR S3C_CFATA_REG(0x54) +#define S3C_ATA_PIO_FED S3C_CFATA_REG(0x58) +#define S3C_ATA_PIO_SCR S3C_CFATA_REG(0x5c) +#define S3C_ATA_PIO_LLR S3C_CFATA_REG(0x60) +#define S3C_ATA_PIO_LMR S3C_CFATA_REG(0x64) +#define S3C_ATA_PIO_LHR S3C_CFATA_REG(0x68) +#define S3C_ATA_PIO_DVR S3C_CFATA_REG(0x6c) +#define S3C_ATA_PIO_CSD S3C_CFATA_REG(0x70) +#define S3C_ATA_PIO_DAD S3C_CFATA_REG(0x74) +#define S3C_ATA_PIO_READY S3C_CFATA_REG(0x78) +#define S3C_ATA_PIO_RDATA S3C_CFATA_REG(0x7c) + +#define S3C_CFATA_MUX_TRUEIDE 0x01 +#define S3C_ATA_CFG_SWAP 0x40 +#define S3C_ATA_CFG_IORDYEN 0x02 + enum s3c_cpu_type { TYPE_S3C64XX, TYPE_S5PC100, |