diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2012-10-17 00:39:09 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-12 16:48:49 +0100 |
commit | f65aad41772f6a0022e9763fe06f47604449964c (patch) | |
tree | 701d6ea74ac0c41f008c5554d876945fe4caf512 /crypto/async_tx/async_pq.c | |
parent | aa1762f49c81a14d0453e4f67f922e4f155510a3 (diff) |
MIPS: Cavium: Add EDAC support.
Drivers for EDAC on Cavium. Supported subsystems are:
o CPU primary caches. These are parity protected only, so only error
reporting.
o Second level cache - ECC protected, provides SECDED.
o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will
will only initialize if ECC is enabled on a system so is safe to run on
non-ECC memory.
o PCI: Parity error reporting
Since it is very hard to test this sort of code the implementation is very
conservative and uses polling where possible for now.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'crypto/async_tx/async_pq.c')
0 files changed, 0 insertions, 0 deletions