diff options
| author | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2021-02-16 00:24:38 +0900 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-02-15 14:59:35 -0800 |
| commit | ec8a42e7343234802b9054874fe01810880289ce (patch) | |
| tree | a97de6405cd92b30cafd27c6dc6cbb9d18cde874 /arch | |
| parent | df53e4f48e8d2225cf6d1fe3dcf389a693d9ccf6 (diff) | |
arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 18 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 25 |
2 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index ed0bf7f13f54..48fa8776e36f 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -41,3 +41,21 @@ clocks = <&uart_clk>; clock-names = "apb_pclk"; }; + +&piether { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + clocks = <&clk300mhz>, <&clk125mhz>; + clock-names = "stmmaceth", "phy_ref_clk"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 242f25f4e12a..3366786699fc 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -134,6 +134,20 @@ #clock-cells = <0>; }; + clk125mhz: clk125mhz { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + #clock-cells = <0>; + clock-output-names = "clk125mhz"; + }; + + clk300mhz: clk300mhz { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + #clock-cells = <0>; + clock-output-names = "clk300mhz"; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -384,6 +398,17 @@ #size-cells = <0>; status = "disabled"; }; + + piether: ethernet@28000000 { + compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a"; + reg = <0 0x28000000 0 0x10000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + snps,txpbl = <4>; + snps,rxpbl = <4>; + snps,tso; + status = "disabled"; + }; }; }; |