diff options
| author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-02-20 14:59:23 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:21 +0100 |
| commit | 88e9a93c9d53ddcf633aa07f14245da7f30408c2 (patch) | |
| tree | 743667e5317873f87f82a430c71de90cd106b34a /arch | |
| parent | 8005711c8d80e452748e9572bead54493818f042 (diff) | |
MIPS: Alchemy: Determine cohereny at runtime based on cpu type
All Alchemy chips have coherent DMA, but for example the USB or AC97
peripherals on the Au1000/1500/1100 are not.
This patch uses DMA_MAYBE_COHERENT on Alchemy and sets coherentio based
on CPU type.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/6576/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/Kconfig | 1 | ||||
| -rw-r--r-- | arch/mips/alchemy/Kconfig | 5 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/setup.c | 10 | ||||
| -rw-r--r-- | arch/mips/pci/pci-alchemy.c | 5 |
4 files changed, 13 insertions, 8 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index daef6709db15..51f5a09f179d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -63,6 +63,7 @@ config MIPS_ALCHEMY select CEVT_R4K select CSRC_R4K select IRQ_CPU + select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_APM_EMULATION diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 7032ac7ecd1b..41386723f9fa 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig @@ -20,7 +20,6 @@ choice config MIPS_MTX1 bool "4G Systems MTX-1 board" - select DMA_NONCOHERENT select HW_HAS_PCI select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN @@ -29,7 +28,6 @@ config MIPS_MTX1 config MIPS_DB1000 bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards" select ALCHEMY_GPIOINT_AU1000 - select DMA_NONCOHERENT select HW_HAS_PCI select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN @@ -39,13 +37,11 @@ config MIPS_DB1235 bool "Alchemy DB1200/PB1200/DB1300/DB1550/PB1550 boards" select ARCH_REQUIRE_GPIOLIB select HW_HAS_PCI - select DMA_COHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_XXS1500 bool "MyCable XXS1500 board" - select DMA_NONCOHERENT select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK @@ -54,7 +50,6 @@ config MIPS_GPR bool "Trapeze ITS GPR board" select ALCHEMY_GPIOINT_AU1000 select HW_HAS_PCI - select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c index 62b4e7bbeab9..566a1743f685 100644 --- a/arch/mips/alchemy/common/setup.c +++ b/arch/mips/alchemy/common/setup.c @@ -30,6 +30,7 @@ #include <linux/jiffies.h> #include <linux/module.h> +#include <asm/dma-coherence.h> #include <asm/mipsregs.h> #include <asm/time.h> @@ -59,6 +60,15 @@ void __init plat_mem_setup(void) /* Clear to obtain best system bus performance */ clear_c0_config(1 << 19); /* Clear Config[OD] */ + hw_coherentio = 0; + coherentio = 1; + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1000: + case ALCHEMY_CPU_AU1500: + case ALCHEMY_CPU_AU1100: + coherentio = 0; + } + board_setup(); /* board specific setup */ /* IO/MEM resources. */ diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c index d1faece21b6a..563d1f61d6ee 100644 --- a/arch/mips/pci/pci-alchemy.c +++ b/arch/mips/pci/pci-alchemy.c @@ -16,6 +16,7 @@ #include <linux/syscore_ops.h> #include <linux/vmalloc.h> +#include <asm/dma-coherence.h> #include <asm/mach-au1x00/au1000.h> #include <asm/tlbmisc.h> @@ -411,17 +412,15 @@ static int alchemy_pci_probe(struct platform_device *pdev) } ctx->alchemy_pci_ctrl.io_map_base = (unsigned long)virt_io; -#ifdef CONFIG_DMA_NONCOHERENT /* Au1500 revisions older than AD have borked coherent PCI */ if ((alchemy_get_cputype() == ALCHEMY_CPU_AU1500) && - (read_c0_prid() < 0x01030202)) { + (read_c0_prid() < 0x01030202) && !coherentio) { val = __raw_readl(ctx->regs + PCI_REG_CONFIG); val |= PCI_CONFIG_NC; __raw_writel(val, ctx->regs + PCI_REG_CONFIG); wmb(); dev_info(&pdev->dev, "non-coherent PCI on Au1500 AA/AB/AC\n"); } -#endif if (pd->board_map_irq) ctx->board_map_irq = pd->board_map_irq; |