diff options
author | Dongjin Kim <tobetter@gmail.com> | 2012-12-18 08:57:06 -0800 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-12-19 09:25:27 -0800 |
commit | 454696fdc864aacaab978755d44d73d418c59788 (patch) | |
tree | e4c7b662a11a090cbb57db4fb50d137666363569 /arch | |
parent | 873673d302e48051c5b90c6e27f86400bdd366ba (diff) |
ARM: EXYNOS: Fix MSHC clocks instance names
Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-exynos/clock-exynos4.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index efead60b9436..bbcb3dea0d40 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = { .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 8), }, { - .name = "dwmmc", + .name = "biu", .parent = &exynos4_clk_aclk_133.clk, .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), @@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = { .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 }, }, { .clk = { - .name = "sclk_dwmmc", + .name = "ciu", .parent = &exynos4_clk_dout_mmc4.clk, .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 16), |