diff options
| author | Roger Quadros <rogerq@ti.com> | 2020-03-16 12:27:31 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-03-17 10:01:28 -0700 |
| commit | dfa7ea303f56a3a8b1ed3b91ef35af2da67ca4ee (patch) | |
| tree | d533299a164f06036c7912d55270f50690836fe9 /arch | |
| parent | 4abd9930d189dedaa59097144c6d8f623342fa72 (diff) | |
ARM: dts: omap5: Add bus_dma_limit for L3 bus
The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)
OMAP5 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.
Add the dma-ranges property to reflect the physical address limit
of the L3 bus.
Cc: stable@kernel.org
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index d0ecf54d5a23..a7562d3deb1a 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -143,6 +143,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0 0xc0000000>; + dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; reg = <0 0x44000000 0 0x2000>, <0 0x44800000 0 0x3000>, |