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authorGary Bisson <gary.bisson@boundarydevices.com>2017-08-17 15:50:10 +0200
committerShawn Guo <shawnguo@kernel.org>2017-08-18 09:40:40 +0800
commitc40bc54fdf2d52a80f66b365f1eac9d43b32e107 (patch)
tree414f215d615b70e74da2bcc6f4be34789608a82b /arch
parent8317562097acec4c9e9750eb91115687931bca35 (diff)
ARM: dts: imx6qdl-nitrogen6_som2: fix PCIe reset
Previous value was a bad copy of nitrogen6_max device tree. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Fixes: 3faa1bb2e89c ("ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
index aeaa5a6e4fcf..a24e4f1911ab 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
@@ -507,7 +507,7 @@
pinctrl_pcie: pciegrp {
fsl,pins = <
/* PCIe reset */
- MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0
+ MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0
>;
};
@@ -668,7 +668,7 @@
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;
+ reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
status = "okay";
};