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authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2014-05-24 11:17:10 -0300
committerArnd Bergmann <arnd@arndb.de>2014-06-17 17:09:45 +0200
commit1ad58443cfa7a60a058f1b956054f19a1d00162d (patch)
tree159fc4d35931b36b816eb284ff0bfd49c2b29b4f /arch
parent3364ee57ae730ab3029172c6ae7487fb37049d38 (diff)
ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB board
The factory bootloader on A385-DB boards expect the ECC strength to be 4 bits over 512 bytes. Hence, we need to specify this in the devicetree, to prevent the kernel from assuming any different ECC scheme. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1400941030-2123-3-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/armada-385-db.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index ff9637dd8d0f..5bae4731828b 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -98,6 +98,8 @@
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";