diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2019-09-01 23:55:49 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-09-02 00:09:30 -0700 |
| commit | 982792f45894878b9ec13df81e6e02209b34cb11 (patch) | |
| tree | 346ad24785f653c5b555b9eeda4ce73a3deeb020 /arch/xtensa | |
| parent | 09f8a6db20e6ed8eab1b2b23d09d2458f6e15062 (diff) | |
xtensa: virt: move PCI root complex to KIO range
Move PCI configuration space, MMIO and memory to the KIO range to free
vmalloc area and use static TLB to access them. Move MMIO to the
beginning of KIO and define PCI_IOBASE as XCHAL_KIO_BYPASS_VADDR to
match it. Reduce number of supported PCI buses to 0x3f so that ECAM
window fits into first 64MB of the KIO. Reduce size of the PCI memory
window to 128MB so that it fits into KIO.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa')
| -rw-r--r-- | arch/xtensa/boot/dts/virt.dts | 8 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/io.h | 1 |
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/xtensa/boot/dts/virt.dts b/arch/xtensa/boot/dts/virt.dts index 6aecbc0f3549..a9dcd87b6eb1 100644 --- a/arch/xtensa/boot/dts/virt.dts +++ b/arch/xtensa/boot/dts/virt.dts @@ -52,12 +52,12 @@ #size-cells = <2>; #interrupt-cells = <0x1>; - bus-range = <0x0 0x3f>; - reg = <0xc0000000 0x04000000>; + bus-range = <0x0 0x3e>; + reg = <0xf0100000 0x03f00000>; // BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2) - ranges = <0x01000000 0x0 0xc4000000 0xc4000000 0x0 0x04000000>, - <0x02000000 0x0 0xc8000000 0xc8000000 0x0 0x18000000>; + ranges = <0x01000000 0x0 0xf0000000 0xf0000000 0x0 0x00010000>, + <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>; // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2) interrupt-map = < diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index da3e783f896b..988e08530a5c 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -21,6 +21,7 @@ #define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) #define IO_SPACE_LIMIT ~0 +#define PCI_IOBASE ((void __iomem *)XCHAL_KIO_BYPASS_VADDR) #ifdef CONFIG_MMU |