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authorThomas Gleixner <tglx@linutronix.de>2020-04-21 11:20:39 +0200
committerBorislav Petkov <bp@suse.de>2020-04-26 18:39:48 +0200
commit96f59fe291d2cdc0fcb6f5f2f4b7c9cea9533fc3 (patch)
tree9ea46077dba10eb3c59fdfebae65b2d3ebd0bbc5 /arch/x86/mm/init.c
parent69de6c1a7fc730260d39f09432d69abc99f5f344 (diff)
x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site
No point in having this exposed. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200421092559.940978251@linutronix.de
Diffstat (limited to 'arch/x86/mm/init.c')
-rw-r--r--arch/x86/mm/init.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 71720dd8f28a..d37e8164022e 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -194,6 +194,19 @@ struct map_range {
static int page_size_mask;
+/*
+ * Save some of cr4 feature set we're using (e.g. Pentium 4MB
+ * enable and PPro Global page enable), so that any CPU's that boot
+ * up after us can get the correct flags. Invoked on the boot CPU.
+ */
+static inline void cr4_set_bits_and_update_boot(unsigned long mask)
+{
+ mmu_cr4_features |= mask;
+ if (trampoline_cr4_features)
+ *trampoline_cr4_features = mmu_cr4_features;
+ cr4_set_bits(mask);
+}
+
static void __init probe_page_size_mask(void)
{
/*