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author | Radim Krčmář <rkrcmar@redhat.com> | 2015-06-30 22:19:16 +0200 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-07-03 18:55:18 +0200 |
commit | 59fd132340b3e37b83179d2fcb673980035edf62 (patch) | |
tree | 205f62686d47c95eb3c4dbbc2b3d48b42b26510d /arch/x86/kvm/lapic.h | |
parent | db1385624c686fe99fe2d1b61a36e1537b915d08 (diff) |
KVM: x86: keep track of LVT0 changes under APICv
Memory-mapped LVT0 register already contains the new value when APICv
traps so we can't directly detect a change.
Memorize a bit we are interested in to enable legacy NMI watchdog.
Suggested-by: Yoshida Nobuo <yoshida.nb@ncos.nec.co.jp>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/lapic.h')
-rw-r--r-- | arch/x86/kvm/lapic.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index f2f4e10ab772..71952748222a 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -26,6 +26,7 @@ struct kvm_lapic { struct kvm_vcpu *vcpu; bool sw_enabled; bool irr_pending; + bool lvt0_in_nmi_mode; /* Number of bits set in ISR. */ s16 isr_count; /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */ |