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authorPeter Zijlstra <peterz@infradead.org>2023-08-07 14:38:07 +0200
committerPeter Zijlstra <peterz@infradead.org>2023-08-09 21:51:06 +0200
commit882cdb06b668488a42ef717a260c05ba7dc43a49 (patch)
tree4d727488dd22489c176cac9a20b7032002f40d56 /arch/x86/include/asm/intel-family.h
parent62af03223785c11a0916df6a854ef4785d2350a5 (diff)
x86/cpu: Fix Gracemont uarch
Alderlake N is an E-core only product using Gracemont micro-architecture. It fits the pre-existing naming scheme perfectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org
Diffstat (limited to 'arch/x86/include/asm/intel-family.h')
-rw-r--r--arch/x86/include/asm/intel-family.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index b3af2d45bbbb..40413262b4cc 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -114,7 +114,6 @@
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
-#define INTEL_FAM6_ALDERLAKE_N 0xBE
#define INTEL_FAM6_RAPTORLAKE 0xB7
#define INTEL_FAM6_RAPTORLAKE_P 0xBA
@@ -154,6 +153,8 @@
#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
+#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */
+
#define INTEL_FAM6_SIERRAFOREST_X 0xAF
#define INTEL_FAM6_GRANDRIDGE 0xB6