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authorIngo Molnar <mingo@kernel.org>2018-03-29 16:03:48 +0200
committerIngo Molnar <mingo@kernel.org>2018-03-29 16:03:48 +0200
commit2d074918fb1568f398777343ff9a28049fb86337 (patch)
tree84277c1471f6d575a9515d42a53345666addabc8 /arch/x86/Kconfig.cpu
parent78282bec4b4a02a13b87d01fbe529396d37db926 (diff)
parentf67b15037a7a50c57f72e69a6d59941ad90a0f0f (diff)
Merge branch 'perf/urgent' into perf/core
Conflicts: kernel/events/hw_breakpoint.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/Kconfig.cpu')
-rw-r--r--arch/x86/Kconfig.cpu13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 8b8d2297d486..638411f22267 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -315,19 +315,6 @@ config X86_L1_CACHE_SHIFT
default "4" if MELAN || M486 || MGEODEGX1
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
-config X86_PPRO_FENCE
- bool "PentiumPro memory ordering errata workaround"
- depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
- ---help---
- Old PentiumPro multiprocessor systems had errata that could cause
- memory operations to violate the x86 ordering standard in rare cases.
- Enabling this option will attempt to work around some (but not all)
- occurrences of this problem, at the cost of much heavier spinlock and
- memory barrier operations.
-
- If unsure, say n here. Even distro kernels should think twice before
- enabling this: there are few systems, and an unlikely bug.
-
config X86_F00F_BUG
def_bool y
depends on M586MMX || M586TSC || M586 || M486