diff options
| author | David S. Miller <davem@davemloft.net> | 2011-09-11 10:42:20 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-09-16 14:21:33 -0700 |
| commit | 08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d (patch) | |
| tree | 07a33d960d2ce5d72733dd21cf8d179fd06d145a /arch/sparc/kernel/cpu.c | |
| parent | 1a8e0da5937a6c87807083baa318cf8f98dac9aa (diff) | |
sparc64: Future proof Niagara cpu detection.
Recognize T4 and T5 chips. Treating them both as "T2 plus other
stuff" should be extremely safe and make sure distributions will work
when those chips actually ship to customers.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/cpu.c')
| -rw-r--r-- | arch/sparc/kernel/cpu.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c index 9810fd881058..ba9b1cec4e6b 100644 --- a/arch/sparc/kernel/cpu.c +++ b/arch/sparc/kernel/cpu.c @@ -481,6 +481,18 @@ static void __init sun4v_cpu_probe(void) sparc_pmu_type = "niagara3"; break; + case SUN4V_CHIP_NIAGARA4: + sparc_cpu_type = "UltraSparc T4 (Niagara4)"; + sparc_fpu_type = "UltraSparc T4 integrated FPU"; + sparc_pmu_type = "niagara4"; + break; + + case SUN4V_CHIP_NIAGARA5: + sparc_cpu_type = "UltraSparc T5 (Niagara5)"; + sparc_fpu_type = "UltraSparc T5 integrated FPU"; + sparc_pmu_type = "niagara5"; + break; + default: printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", prom_cpu_compatible); |