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authorLinus Torvalds <torvalds@linux-foundation.org>2015-06-23 13:38:04 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-06-23 13:38:04 -0700
commita57f14bac07f63118d947f53976d7f15c04b062a (patch)
tree36a253602d5a4d121fed8cd2dd6a4002d8c31e73 /arch/powerpc
parent10b4b096d0c7e9f1b5f84c2a0658b2963e1e6ed0 (diff)
parenta8c27c0bea45c6531fbc1e3be79ddd5a9bc1ba3e (diff)
Merge tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson: "Here are the changes for MMC for v4.2. MMC core: - Fix an error path in the mmc block layer - Fix PM domain attachment for the SDIO bus - Add support for driver strength selection - Increase a delay to let voltage stabilize - Add support for disabling write-protect detection - Add facility to support re-tuning - Re-tune and retry in the recovery path - Add reset option for SDIO - Consolidations and clean-ups MMC host: - Add Mediatek MMC driver - Constify platform_device_id for a couple of hosts - Fix modalias to make module auto-loading work for a couple of hosts - sdhci: Add support for sdhci-arasan4.9a - sdhci: Fix low memory corruption - sdhci: Restore behavior while creating OCR mask - sdhci: Add a callback to select drive strength - sdhci: Fix driver type B and D handling - sdhci: Add support for drive strength selection for SPT - sdhci: Enable HS400 for some Intel host controllers - sdhci: Convert to use the new re-tuning facility - sdhci: Various minor fixes and clean-ups - dw_mmc: Add support for hi6220 - dw_mmc: Use core to handle absent write protect line - dw_mmc: Add support to switch voltage - tmio: Some fixes and modernizations - sh_mmcif: Improve clock rate calculation" * tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc: (98 commits) mmc: queue: prevent soft lockups on PREEMPT=n mmc: mediatek: Add PM support for MMC driver mmc: mediatek: Add Mediatek MMC driver mmc: dt-bindings: add Mediatek MMC bindings mmc: card: Fixup request missing in mmc_blk_issue_rw_rq mmc: sdhci: fix low memory corruption mmc: sdhci-pci: Change AMD SDHCI quirk application scope i2c-piix4: Use Macro for AMD CZ SMBus device ID pci_ids: Add AMD KERNCZ device ID support mmc: queue: use swap() in mmc_queue_thread() mmc: dw_mmc: insmod followed by rmmod will hung for eMMC mmc: sdhci: Restore behavior while creating OCR mask mmc: sdhci-pxav3: fix device wakeup initialization mmc: core: Attach PM domain prior probing of SDIO func driver mmc: core: Remove redundant ->power_restore() callback for SD mmc: core: Remove redundant ->power_restore() callback for MMC mmc: sdhci-bcm2835: Actually enable the clock mmc: sdhci-bcm2835: Clean up platform allocations if sdhci init fails. mmc: sdhci-of-esdhc: enable interrupt mode to detect card mmc: sdhci-esdhc-imx: add quirk SDHCI_QUIRK2_BROKEN_HS200 for imx6qdl ...
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi1
5 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index f2feacfd9a25..b6a0e88ee5ce 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -370,6 +370,7 @@
/include/ "qoriq-esdhc-0.dtsi"
sdhc@114000 {
+ compatible = "fsl,p2041-esdhc", "fsl,esdhc";
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
sdhci,auto-cmd12;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index d6fea37395ad..cf18f7bf824f 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -397,6 +397,7 @@
/include/ "qoriq-esdhc-0.dtsi"
sdhc@114000 {
+ compatible = "fsl,p3041-esdhc", "fsl,esdhc";
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
sdhci,auto-cmd12;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 89482c9b2301..90431c0b53ad 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -469,6 +469,7 @@
/include/ "qoriq-esdhc-0.dtsi"
sdhc@114000 {
+ compatible = "fsl,p4080-esdhc", "fsl,esdhc";
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
voltage-ranges = <3300 3300>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 6e04851e2fc9..8be61d11349e 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -384,6 +384,7 @@
/include/ "qoriq-esdhc-0.dtsi"
sdhc@114000 {
+ compatible = "fsl,p5020-esdhc", "fsl,esdhc";
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
sdhci,auto-cmd12;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 5e44dfa1e1a5..48e232f2d50d 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -362,6 +362,7 @@
/include/ "qoriq-esdhc-0.dtsi"
sdhc@114000 {
+ compatible = "fsl,p5040-esdhc", "fsl,esdhc";
fsl,iommu-parent = <&pamu2>;
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
sdhci,auto-cmd12;