diff options
| author | Scott Wood <oss@buserror.net> | 2016-03-15 01:47:38 -0500 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-03-16 15:22:16 +1100 |
| commit | 7a25d91214cb22e642b9ed6e4434bfaf74adad28 (patch) | |
| tree | 9336b5dee251126703e6ea2ec90126c9b08f60df /arch/powerpc | |
| parent | a1b5344620a3e6291afaf7542714ba9c391ef1c7 (diff) | |
powerpc/book3e-64: Use hardcoded mttmr opcode
This preserves the ability to build using older binutils (reportedly <=
2.22).
Fixes: 6becef7ea04a ("powerpc/mpc85xx: Add CPU hotplug support for E6500")
Signed-off-by: Scott Wood <oss@buserror.net>
Cc: chenhui.zhao@freescale.com
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/kernel/head_64.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 291628320fbe..4286775cbde9 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -41,6 +41,7 @@ #include <asm/ptrace.h> #include <asm/hw_irq.h> #include <asm/cputhreads.h> +#include <asm/ppc-opcode.h> /* The physical memory is laid out such that the secondary processor * spin code sits at 0x0000...0x00ff. On server, the vectors follow @@ -207,12 +208,12 @@ _GLOBAL(book3e_start_thread) /* If the thread id is invalid, just exit. */ b 13f 10: - mttmr TMRN_IMSR0, r5 - mttmr TMRN_INIA0, r4 + MTTMR(TMRN_IMSR0, 5) + MTTMR(TMRN_INIA0, 4) b 12f 11: - mttmr TMRN_IMSR1, r5 - mttmr TMRN_INIA1, r4 + MTTMR(TMRN_IMSR1, 5) + MTTMR(TMRN_INIA1, 4) 12: isync li r6, 1 |