diff options
| author | Trent Piepho <tpiepho@freescale.com> | 2008-11-19 10:40:55 -0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-11-19 15:12:15 -0600 |
| commit | f464ff581c247d82fcc0e7ef40c1ca6df9739068 (patch) | |
| tree | 956b01f569d9cef47c754c42fa24bcf29c055ba0 /arch/powerpc/boot/dts/mpc8572ds.dts | |
| parent | 7f0f598a0069d1ab072375965a4b69137233169c (diff) | |
powerpc/85xx: L2 cache size wrong in 8572DS dts
It's 1MB, not 512KB. Newer U-Boots will fix this entry, but that's no
reason to have the wrong value in the dts.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8572ds.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8572ds.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index cadd4652a695..5c69b2fafd32 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -90,7 +90,7 @@ compatible = "fsl,mpc8572-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K + cache-size = <0x100000>; // L2, 1M interrupt-parent = <&mpic>; interrupts = <16 2>; }; |