diff options
| author | Nickhu <nickhu@andestech.com> | 2018-10-25 10:24:14 +0800 |
|---|---|---|
| committer | Greentime Hu <greentime@andestech.com> | 2018-11-06 18:01:39 +0800 |
| commit | 9aaafac8cffa1c1edb66e19a63841b7c86be07ca (patch) | |
| tree | 0e8083b4b1246d57f658776bad6c3b148ee466dc /arch/nds32 | |
| parent | 4c3d6174e0e17599549f636ec48ddf78627a17fe (diff) | |
nds32: Fix bug in bitfield.h
There two bitfield bug for perfomance counter
in bitfield.h:
PFM_CTL_offSEL1 21 --> 16
PFM_CTL_offSEL2 27 --> 22
This commit fix it.
Signed-off-by: Nickhu <nickhu@andestech.com>
Acked-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
Diffstat (limited to 'arch/nds32')
| -rw-r--r-- | arch/nds32/include/asm/bitfield.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/nds32/include/asm/bitfield.h b/arch/nds32/include/asm/bitfield.h index 8e84fc385b94..19b2841219ad 100644 --- a/arch/nds32/include/asm/bitfield.h +++ b/arch/nds32/include/asm/bitfield.h @@ -692,8 +692,8 @@ #define PFM_CTL_offKU1 13 /* Enable user mode event counting for PFMC1 */ #define PFM_CTL_offKU2 14 /* Enable user mode event counting for PFMC2 */ #define PFM_CTL_offSEL0 15 /* The event selection for PFMC0 */ -#define PFM_CTL_offSEL1 21 /* The event selection for PFMC1 */ -#define PFM_CTL_offSEL2 27 /* The event selection for PFMC2 */ +#define PFM_CTL_offSEL1 16 /* The event selection for PFMC1 */ +#define PFM_CTL_offSEL2 22 /* The event selection for PFMC2 */ /* bit 28:31 reserved */ #define PFM_CTL_mskEN0 ( 0x01 << PFM_CTL_offEN0 ) |