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authorLinus Torvalds <torvalds@linux-foundation.org>2019-07-17 10:07:48 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-07-17 10:07:48 -0700
commit916f562fb28a49457d3d99d156ca415b50d6750e (patch)
tree077cf5d2cd0c126847a5d1d91e6287ba77a98dba /arch/mips
parentedafb6fe42cfa98f4abf8c63acc5f4db011ed7b9 (diff)
parentb1511f7a48c3ab28ae10b7ea1e9eae1481525bbe (diff)
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "This round of clk driver and framework updates is heavy on the driver update side. The two main highlights in the core framework are the addition of an bulk clk_get API that handles optional clks and an extra debugfs file that tells the developer about the current parent of a clk. The driver updates are dominated by i.MX in the diffstat, but that is mostly because that SoC has started converting to the clk_hw style of clk registration. The next big update is in the Amlogic meson clk driver that gained some support for audio, cpu, and temperature clks while fixing some PLL issues. Finally, the biggest thing that stands out is the conversion of a large part of the Allwinner sunxi-ng driver to the new clk parent scheme that uses less strings and more pointer comparisons to match clk parents and children up. In general, it looks like we have a lot of little fixes and tweaks here and there to clk data along with the normal addition of a handful of new drivers and a couple new core framework features. Core: - Add a 'clk_parent' file in clk debugfs - Add a clk_bulk_get_optional() API (with devm too) New Drivers: - Support gated clk controller on MIPS based BCM63XX SoCs - Support SiLabs Si5341 and Si5340 chips - Support for CPU clks on Raspberry Pi devices - Audsys clock driver for MediaTek MT8516 SoCs Updates: - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme - Small frequency support for SiLabs Si544 chips - Slow clk support for AT91 SAM9X60 SoCs - Remove dead code in various clk drivers (-Wunused) - Support for Marvell 98DX1135 SoCs - Get duty cycle of generic pwm clks - Improvement in mmc phase calculation and cleanup of some rate defintions - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs - Add GPIO, SNVS and GIC clocks for i.MX8 drivers - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting - Add clks for new Exynos5422 Dynamic Memory Controller driver - Clock definition for Exynos4412 Mali - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3 - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs - TI clock probing done from DT by default instead of firmware - Fix Amlogic Meson mpll fractional part and spread sprectrum issues - Add Amlogic meson8 audio clocks - Add Amlogic g12a temperature sensors clocks - Add Amlogic g12a and g12b cpu clocks - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W - Add Clock Domain support on Renesas RZ/N1" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (190 commits) clk: consoldiate the __clk_get_hw() declarations clk: sprd: Add check for return value of sprd_clk_regmap_init() clk: lochnagar: Update DT binding doc to include the primary SPDIF MCLK clk: Add Si5341/Si5340 driver dt-bindings: clock: Add silabs,si5341 clk: clk-si544: Implement small frequency change support clk: add BCM63XX gated clock controller driver devicetree: document the BCM63XX gated clock bindings clk: at91: sckc: use dedicated functions to unregister clock clk: at91: sckc: improve error path for sama5d4 sck registration clk: at91: sckc: remove unnecessary line clk: at91: sckc: improve error path for sam9x5 sck register clk: at91: sckc: add support to free slow clock osclillator clk: at91: sckc: add support to free slow rc oscillator clk: at91: sckc: add support to free slow oscillator clk: rockchip: export HDMIPHY clock on rk3228 clk: rockchip: add watchdog pclk on rk3328 clk: rockchip: add clock id for hdmi_phy special clock on rk3228 clk: rockchip: add clock id for watchdog pclk on rk3328 clk: at91: sckc: add support for SAM9X60 ...
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mach-jz4740/clock.h22
-rw-r--r--arch/mips/jz4740/board-qi_lb60.c2
-rw-r--r--arch/mips/jz4740/platform.c2
-rw-r--r--arch/mips/jz4740/pm.c8
-rw-r--r--arch/mips/jz4740/time.c3
5 files changed, 0 insertions, 37 deletions
diff --git a/arch/mips/include/asm/mach-jz4740/clock.h b/arch/mips/include/asm/mach-jz4740/clock.h
deleted file mode 100644
index 600d5051691a..000000000000
--- a/arch/mips/include/asm/mach-jz4740/clock.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- */
-
-#ifndef __ASM_JZ4740_CLOCK_H__
-#define __ASM_JZ4740_CLOCK_H__
-
-enum jz4740_wait_mode {
- JZ4740_WAIT_MODE_IDLE,
- JZ4740_WAIT_MODE_SLEEP,
-};
-
-void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode);
-
-void jz4740_clock_suspend(void);
-void jz4740_clock_resume(void);
-
-void jz4740_clock_udc_enable_auto_suspend(void);
-void jz4740_clock_udc_disable_auto_suspend(void);
-
-#endif
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index daed44ee116d..4a7a80c358c7 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -37,8 +37,6 @@
#include <asm/mach-jz4740/platform.h>
-#include "clock.h"
-
/* GPIOs */
#define QI_LB60_GPIO_KEYOUT(x) (JZ_GPIO_PORTC(10) + (x))
#define QI_LB60_GPIO_KEYIN(x) (JZ_GPIO_PORTD(18) + (x))
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index 4b89abb17950..c74c99f5951d 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -21,8 +21,6 @@
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
-#include "clock.h"
-
/* USB Device Controller */
struct platform_device jz4740_udc_xceiv_device = {
.name = "usb_phy_generic",
diff --git a/arch/mips/jz4740/pm.c b/arch/mips/jz4740/pm.c
index bbdd2b801e6e..f9b551f01f42 100644
--- a/arch/mips/jz4740/pm.c
+++ b/arch/mips/jz4740/pm.c
@@ -9,21 +9,13 @@
#include <linux/delay.h>
#include <linux/suspend.h>
-#include <asm/mach-jz4740/clock.h>
-
static int jz4740_pm_enter(suspend_state_t state)
{
- jz4740_clock_suspend();
-
- jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP);
-
__asm__(".set\tmips3\n\t"
"wait\n\t"
".set\tmips0");
- jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE);
- jz4740_clock_resume();
return 0;
}
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index a3260c754e65..cb768e560d8b 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -13,13 +13,10 @@
#include <linux/clockchips.h>
#include <linux/sched_clock.h>
-#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/irq.h>
#include <asm/mach-jz4740/timer.h>
#include <asm/time.h>
-#include "clock.h"
-
#define TIMER_CLOCKEVENT 0
#define TIMER_CLOCKSOURCE 1