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authorRalf Baechle <ralf@linux-mips.org>2015-04-13 16:03:32 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-04-13 16:03:32 +0200
commit3e20a26b02bd4f24945c87407df51948dd488620 (patch)
treef466d3b2a47a98ec2910724e17ee2f3a93c1a49e /arch/mips/netlogic/xlp
parent98b0429b7abd5c05efdb23f3eba02ec3f696748e (diff)
parent5306a5450824691e27d68f711758515debedeeac (diff)
Merge branch '4.0-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/netlogic/xlp')
-rw-r--r--arch/mips/netlogic/xlp/ahci-init-xlp2.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/netlogic/xlp/ahci-init-xlp2.c b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
index c83dbf3689e2..7b066a44e679 100644
--- a/arch/mips/netlogic/xlp/ahci-init-xlp2.c
+++ b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
@@ -203,6 +203,7 @@ static u8 read_phy_reg(u64 regbase, u32 addr, u32 physel)
static void config_sata_phy(u64 regbase)
{
u32 port, i, reg;
+ u8 val;
for (port = 0; port < 2; port++) {
for (i = 0, reg = RXCDRCALFOSC0; reg <= CALDUTY; reg++, i++)
@@ -210,6 +211,18 @@ static void config_sata_phy(u64 regbase)
for (i = 0, reg = RXDPIF; reg <= PPMDRIFTMAX_HI; reg++, i++)
write_phy_reg(regbase, reg, port, sata_phy_config2[i]);
+
+ /* Fix for PHY link up failures at lower temperatures */
+ write_phy_reg(regbase, 0x800F, port, 0x1f);
+
+ val = read_phy_reg(regbase, 0x0029, port);
+ write_phy_reg(regbase, 0x0029, port, val | (0x7 << 1));
+
+ val = read_phy_reg(regbase, 0x0056, port);
+ write_phy_reg(regbase, 0x0056, port, val & ~(1 << 3));
+
+ val = read_phy_reg(regbase, 0x0018, port);
+ write_phy_reg(regbase, 0x0018, port, val & ~(0x7 << 0));
}
}