diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-09 17:26:39 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-29 02:42:25 +0200 |
| commit | b70eb30056dc84568f3d32440d9be6a558025843 (patch) | |
| tree | 2e0ab36189d3eb6dbf5bbb995b9aa7bf896a6e0f /arch/mips/kernel/Makefile | |
| parent | 8263db4d7768448cb06adbbdd14c613a1ea09830 (diff) | |
MIPS: cmpxchg: Implement 1 byte & 2 byte xchg()
Implement 1 & 2 byte xchg() using read-modify-write atop a 4 byte
cmpxchg(). This allows us to support these atomic operations despite the
MIPS ISA only providing for 4 & 8 byte atomic operations.
This is required in order to support queued spinlocks (qspinlock) in a
later patch, since these make use of a 2 byte xchg() in their slow path.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/Makefile')
| -rw-r--r-- | arch/mips/kernel/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index f0edd7e8a0b7..46c0581256f1 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -4,7 +4,7 @@ extra-y := head.o vmlinux.lds -obj-y += cpu-probe.o branch.o elf.o entry.o genex.o idle.o irq.o \ +obj-y += cmpxchg.o cpu-probe.o branch.o elf.o entry.o genex.o idle.o irq.o \ process.o prom.o ptrace.o reset.o setup.o signal.o \ syscall.o time.o topology.o traps.o unaligned.o watch.o \ vdso.o cacheinfo.o |