diff options
| author | Yang Ling <gnaygnil@gmail.com> | 2016-05-19 12:29:30 +0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-10-04 16:13:57 +0200 |
| commit | 12e3280b33fe1ada85b84f67613d03e1b6d8dbf6 (patch) | |
| tree | 64f4f14777dacb875c01400d057f532b77795f21 /arch/mips/Kconfig | |
| parent | a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e (diff) | |
MIPS: Loongson1C: Add board support
Adds basic platform devices for Loongson1C, including serial port
and ethernet.
Signed-off-by: Yang Ling <gnaygnil@gmail.com>
Cc: keguang.zhang@gmail.com
Cc: chenhc@lemote.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13304/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 212ff92920d2..6fba0eff858e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1402,6 +1402,16 @@ config CPU_LOONGSON1B The Loongson 1B is a 32-bit SoC, which implements the MIPS32 release 2 instruction set. +config CPU_LOONGSON1C + bool "Loongson 1C" + depends on SYS_HAS_CPU_LOONGSON1C + select CPU_LOONGSON1 + select ARCH_WANT_OPTIONAL_GPIOLIB + select LEDS_GPIO_REGISTER + help + The Loongson 1C is a 32-bit SoC, which implements the MIPS32 + release 2 instruction set. + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 @@ -1851,6 +1861,9 @@ config SYS_HAS_CPU_LOONGSON2F config SYS_HAS_CPU_LOONGSON1B bool +config SYS_HAS_CPU_LOONGSON1C + bool + config SYS_HAS_CPU_MIPS32_R1 bool |