summaryrefslogtreecommitdiff
path: root/arch/loongarch/mm/extable.c
diff options
context:
space:
mode:
authorHuacai Chen <chenhuacai@loongson.cn>2022-05-31 18:04:11 +0800
committerHuacai Chen <chenhuacai@loongson.cn>2022-06-03 20:09:28 +0800
commit09cfefb7fa70c3af011b0db0a513fd80b2f18abc (patch)
treefc1a269ecba1f88cabb2e79ee92251612ed6605a /arch/loongarch/mm/extable.c
parent803b0fc5c3f2baa6e54978cd576407896f789b08 (diff)
LoongArch: Add memory management
Add memory management support for LoongArch, including: cache and tlb management, page fault handling and ioremap/mmap support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/mm/extable.c')
-rw-r--r--arch/loongarch/mm/extable.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/loongarch/mm/extable.c b/arch/loongarch/mm/extable.c
new file mode 100644
index 000000000000..bc20988f2b87
--- /dev/null
+++ b/arch/loongarch/mm/extable.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
+ */
+#include <linux/extable.h>
+#include <linux/spinlock.h>
+#include <asm/branch.h>
+#include <linux/uaccess.h>
+
+int fixup_exception(struct pt_regs *regs)
+{
+ const struct exception_table_entry *fixup;
+
+ fixup = search_exception_tables(exception_era(regs));
+ if (fixup) {
+ regs->csr_era = fixup->fixup;
+
+ return 1;
+ }
+
+ return 0;
+}