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authorTroy Heber <troy.heber@hp.com>2006-10-25 14:46:15 -0600
committerTony Luck <tony.luck@intel.com>2006-10-31 14:32:10 -0800
commitfa1d19e5d9a94120f31e5783ab44758f46892d94 (patch)
treecb685f4b1cc31d633d04561ea9f31e40e43a3fc1 /arch/ia64/kernel/sal.c
parent264b0f99308436deaee38bab99e586612d012fc1 (diff)
[IA64] move SAL_CACHE_FLUSH check later in boot
The check to see if the firmware drops interrupts during a SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects to be able to make PAL calls in virtual mode, on some cell based machines a fault occurs causing a MCA. This patch moves the check after mmu_context_init so the TLB and VHPT are properly setup. Signed-off-by Troy Heber <troy.heber@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/sal.c')
-rw-r--r--arch/ia64/kernel/sal.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c
index 642fdc7b969d..20bad78b5073 100644
--- a/arch/ia64/kernel/sal.c
+++ b/arch/ia64/kernel/sal.c
@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { }
*/
static int sal_cache_flush_drops_interrupts;
-static void __init
+void __init
check_sal_cache_flush (void)
{
unsigned long flags;
int cpu;
- u64 vector;
+ u64 vector, cache_type = 3;
+ struct ia64_sal_retval isrv;
cpu = get_cpu();
local_irq_save(flags);
@@ -243,7 +244,10 @@ check_sal_cache_flush (void)
while (!ia64_get_irr(IA64_TIMER_VECTOR))
cpu_relax();
- ia64_sal_cache_flush(3);
+ SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
+
+ if (isrv.status)
+ printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status);
if (ia64_get_irr(IA64_TIMER_VECTOR)) {
vector = ia64_get_ivr();
@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab)
p += SAL_DESC_SIZE(*p);
}
- check_sal_cache_flush();
}
int