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author | Mark Rutland <mark.rutland@arm.com> | 2023-06-05 08:01:03 +0100 |
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committer | Peter Zijlstra <peterz@infradead.org> | 2023-06-05 09:57:15 +0200 |
commit | d6cd3664806fbe8313b8e04b042d40e8135ca459 (patch) | |
tree | 3b6c3bb4831938d661179ecdb96dd33e3449acc2 /arch/hexagon | |
parent | f739287ef57bc01155e556033462e9a6ff020c97 (diff) |
locking/atomic: arm: add preprocessor symbols
Some atomics can be implemented in several different ways, e.g.
FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of
RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms
of FULL ordered atomics. Other atomics are optional, and don't exist in
some configurations (e.g. not all architectures implement the 128-bit
cmpxchg ops).
Subsequent patches will require that architectures define a preprocessor
symbol for any atomic (or ordering variant) which is optional. This will
make the fallback ifdeffery more robust, and simplify future changes.
Add the required definitions to arch/arm.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20230605070124.3741859-7-mark.rutland@arm.com
Diffstat (limited to 'arch/hexagon')
0 files changed, 0 insertions, 0 deletions