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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2016-06-08 17:06:13 +0200
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-12-31 15:50:09 +0100
commitb0492361e9d449f9b712f396188bcbee045fd460 (patch)
tree74a99821f2caba0a76b4620e2618fb43b5d1df8f /arch/arm
parent1a4e63d420b4bc2e4ec4f017782b4006a6c99869 (diff)
ARM: dts: at91: at91sam9g45: TC blocks are also simple-mfd and syscon devices
Add simple-mfd and syscon to the TC blocks to allow to register one of the channels as clocksource properly at boot time and free up the remaining channels for other use. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 98348ebd6488..3a30eec7f508 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -415,7 +415,9 @@
};
tcb0: timer@fff7c000 {
- compatible = "atmel,at91rm9200-tcb";
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
@@ -423,7 +425,9 @@
};
tcb1: timer@fffd4000 {
- compatible = "atmel,at91rm9200-tcb";
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xfffd4000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;