diff options
| author | Shaik Sajida Bhanu <sbhanu@codeaurora.org> | 2021-08-16 22:20:50 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-09-23 15:26:38 -0500 |
| commit | 752432e40e8f0d02d0af07cce2d6d4b250be11ef (patch) | |
| tree | 1aab9e33de57729862dd307876e8fe5f4a12214c /arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | |
| parent | 0c38d6b6a6a6f15723c875bf97bed51cfda6e4ee (diff) | |
arm64: dts: qcom: sc7180: Use maximum drive strength values for eMMC
The current drive strength values are not sufficient on non discrete
boards and this leads to CRC errors during switching to HS400 enhanced
strobe mode.
Hardware simulation results on non discrete boards shows up that use the
maximum drive strength values for data and command lines could helps
in avoiding these CRC errors.
So, update data and command line drive strength values to maximum.
Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1629132650-26277-1-git-send-email-sbhanu@codeaurora.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 6a216e17b96a..8685931553b3 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -1513,13 +1513,13 @@ ap_spi_fp: &spi10 { pinconf-cmd { pins = "sdc1_cmd"; bias-pull-up; - drive-strength = <10>; + drive-strength = <16>; }; pinconf-data { pins = "sdc1_data"; bias-pull-up; - drive-strength = <10>; + drive-strength = <16>; }; pinconf-rclk { |