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authorThierry Reding <treding@nvidia.com>2023-07-26 18:43:18 +0200
committerThierry Reding <treding@nvidia.com>2023-07-27 16:48:09 +0200
commit6e752d4a2f5abfda9d395eec5ac28085e36e5c81 (patch)
treecd7c9f22fe97e87345a46d47fadee91e23d8027c /arch/arm64/boot/dts/nvidia
parentee561fc4fa0c55d719e69f8498ad0726411e412d (diff)
arm64: tegra: Remove {clock,reset}-names from VIC powergate
According to the device tree bindings, the powergate definition nodes don't contain clock-names and reset-names properties, so remove them. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210.dtsi2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index e7b4e3013964..47f8268e46bf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -916,9 +916,7 @@
pd_vic: vic {
clocks = <&tegra_car TEGRA210_CLK_VIC03>;
- clock-names = "vic";
resets = <&tegra_car 178>;
- reset-names = "vic";
#power-domain-cells = <0>;
};