diff options
author | Allen-KH Cheng <allen-kh.cheng@mediatek.com> | 2022-04-19 14:32:26 +0800 |
---|---|---|
committer | Matthias Brugger <matthias.bgg@gmail.com> | 2022-04-26 10:58:57 +0200 |
commit | a8bbcf703cf3c5cb63dd8516abc87262ad86b635 (patch) | |
tree | 327ef3c7aceb4e3d16301540cba175a52dd81e47 /arch/arm64/boot/dts/mediatek | |
parent | b59add5e6e5a66ae3f6a42a573b6e56b6dbaee41 (diff) |
arm64: dts: mt8192: Add spmi node
Add spmi node for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20220419063226.15958-2-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index a6da7b04b9d4..164fae36a3d8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -537,6 +537,21 @@ assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; }; + spmi: spmi@10027000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0 0x10027000 0 0x000e00>, + <0 0x10029000 0 0x000100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; + }; + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8192-scp_adsp"; reg = <0 0x10720000 0 0x1000>; |