summaryrefslogtreecommitdiff
path: root/arch/arm/mach-mv78xx0
diff options
context:
space:
mode:
authorJeremy J. Peper <jeremy@jeremypeper.com>2023-03-17 10:43:46 -0500
committerArnd Bergmann <arnd@arndb.de>2023-04-18 17:04:28 +0200
commit4b01f735a619ae535d4459aec3b070c9336e56b4 (patch)
treef6daa4d1d09f90d334ca60dac0a106710681edd3 /arch/arm/mach-mv78xx0
parent189e3ddb64cca682fc13a0f3d7216a1314a7975d (diff)
ARM: mv78xx0: add code to enable XOR and CRYPTO engines on mv78xx0
Adding missing code/values required to enable the XOR and CESA engines for this SoC Signed-off-by: Jeremy J. Peper <jeremy@jeremypeper.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mv78xx0')
-rw-r--r--arch/arm/mach-mv78xx0/buffalo-wxl-setup.c2
-rw-r--r--arch/arm/mach-mv78xx0/common.c23
-rw-r--r--arch/arm/mach-mv78xx0/common.h2
-rw-r--r--arch/arm/mach-mv78xx0/mv78xx0.h10
4 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index c3f6dc3518af..31359f586657 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -119,6 +119,8 @@ static void __init wxl_init(void)
mv78xx0_uart1_init();
mv78xx0_uart2_init();
mv78xx0_uart3_init();
+ mv78xx0_xor_init();
+ mv78xx0_crypto_init();
mv78xx0_i2c_init();
i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
}
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 461a68945c26..679753fcc0ef 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -342,6 +342,29 @@ void __ref mv78xx0_timer_init(void)
IRQ_MV78XX0_TIMER_1, get_tclk());
}
+/****************************************************************************
+* XOR engine
+****************************************************************************/
+void __init mv78xx0_xor_init(void)
+{
+ orion_xor0_init(XOR_PHYS_BASE,
+ XOR_PHYS_BASE + 0x200,
+ IRQ_MV78XX0_XOR_0, IRQ_MV78XX0_XOR_1);
+}
+
+/****************************************************************************
+ * Cryptographic Engines and Security Accelerator (CESA)
+****************************************************************************/
+void __init mv78xx0_crypto_init(void)
+{
+ mvebu_mbus_add_window_by_id(MV78XX0_MBUS_SRAM_TARGET,
+ MV78XX0_MBUS_SRAM_ATTR,
+ MV78XX0_SRAM_PHYS_BASE,
+ MV78XX0_SRAM_SIZE);
+ orion_crypto_init(CRYPTO_PHYS_BASE, MV78XX0_SRAM_PHYS_BASE,
+ SZ_8K, IRQ_MV78XX0_CRYPTO);
+}
+
/*****************************************************************************
* General
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index d8c6c2400e27..9f1dfd595003 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -43,6 +43,8 @@ void mv78xx0_uart0_init(void);
void mv78xx0_uart1_init(void);
void mv78xx0_uart2_init(void);
void mv78xx0_uart3_init(void);
+void mv78xx0_xor_init(void);
+void mv78xx0_crypto_init(void);
void mv78xx0_i2c_init(void);
void mv78xx0_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-mv78xx0/mv78xx0.h b/arch/arm/mach-mv78xx0/mv78xx0.h
index 3f19bef7d7ac..88efb1e44142 100644
--- a/arch/arm/mach-mv78xx0/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/mv78xx0.h
@@ -49,9 +49,15 @@
#define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
#define MV78XX0_REGS_SIZE SZ_1M
+#define MV78XX0_SRAM_PHYS_BASE (0xf2200000)
+#define MV78XX0_SRAM_SIZE SZ_8K
+
#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000
#define MV78XX0_PCIE_MEM_SIZE 0x30000000
+#define MV78XX0_MBUS_SRAM_TARGET 0x09
+#define MV78XX0_MBUS_SRAM_ATTR 0x00
+
/*
* Core-specific peripheral registers.
*/
@@ -98,6 +104,8 @@
#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x51000)
#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x52000)
+#define XOR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x60900)
+
#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x70000)
#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x74000)
@@ -106,6 +114,8 @@
#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x88000)
#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x8c000)
+#define CRYPTO_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x90000)
+
#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0xa0000)
/*