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authorJeremy J. Peper <jeremy@jeremypeper.com>2023-03-17 10:43:44 -0500
committerArnd Bergmann <arnd@arndb.de>2023-04-18 17:04:13 +0200
commitcf15079c6b6163c15254437d862351e5b438be8b (patch)
tree0bf58293411163473c4b71ee7089872b6ff53a03 /arch/arm/mach-mv78xx0
parentec79ed5e15e55e0d641b90dcc60371dd562f5322 (diff)
ARM: mv78xx0: adjust init logic for ts-wxl to reflect single core dev
Original code was largely copy-pasted from the reference board code, adjust pcie initialiazation to reflect the TS-WXL using the single-core variant of this SoC. Correct pcie_port_size to be a power of 2 as required. Signed-off-by: Jeremy J. Peper <jeremy@jeremypeper.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mv78xx0')
-rw-r--r--arch/arm/mach-mv78xx0/buffalo-wxl-setup.c12
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c2
2 files changed, 3 insertions, 11 deletions
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 9aa765d4cdc8..383dc6eab71a 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -125,16 +125,8 @@ static void __init wxl_init(void)
static int __init wxl_pci_init(void)
{
- if (machine_is_terastation_wxl()) {
- /*
- * Assign the x16 PCIe slot on the board to CPU core
- * #0, and let CPU core #1 have the four x1 slots.
- */
- if (mv78xx0_core_index() == 0)
- mv78xx0_pcie_init(0, 1);
- else
- mv78xx0_pcie_init(1, 0);
- }
+ if (machine_is_terastation_wxl() && mv78xx0_core_index() == 0)
+ mv78xx0_pcie_init(1, 1);
return 0;
}
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 6190f538a124..fa68b63941b1 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -42,7 +42,7 @@ void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
u32 pcie_port_size[8] = {
0,
- 0x30000000,
+ 0x20000000,
0x10000000,
0x10000000,
0x08000000,