diff options
| author | Anson Huang <b20788@freescale.com> | 2015-08-05 01:48:37 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-09-17 08:54:35 +0800 |
| commit | ee4a5f838c8437484c9387e9ef9256332f07f3dd (patch) | |
| tree | 29ae88eb6027eddaeaa6f036a0dc98f66281ac6f /arch/arm/mach-imx/suspend-imx6.S | |
| parent | 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff) | |
ARM: imx: add suspend/resume support for i.mx6ul
This patch adds suspend function for i.MX6UL, it supports
"standby" and "mem" mode, for "standby" mode, SoC will
enter STOP mode only, while for "mem" mode, SoC will
enter STOP mode and DDR IO will be set to low power
mode.
As i.MX6UL contains a "Cortex-A7" ARM core which has no
PL310, so we need to avoid any PL310 operations during
suspend/resume, also, we need to flush Cortex-A7's inernal
L2 cache before suspend.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/suspend-imx6.S')
| -rw-r--r-- | arch/arm/mach-imx/suspend-imx6.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index b99987b023fa..76ee2ceec8d5 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -79,12 +79,15 @@ /* sync L2 cache to drain L2's buffers to DRAM. */ #ifdef CONFIG_CACHE_L2X0 ldr r11, [r0, #PM_INFO_MX6Q_L2_V_OFFSET] + teq r11, #0 + beq 6f mov r6, #0x0 str r6, [r11, #L2X0_CACHE_SYNC] 1: ldr r6, [r11, #L2X0_CACHE_SYNC] ands r6, r6, #0x1 bne 1b +6: #endif .endm |