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authorShawn Guo <shawn.guo@linaro.org>2013-08-13 14:59:43 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-10-21 09:13:12 +0800
commitf1c6f314727c7595e249c7da3933ba2bc6219e58 (patch)
tree8e2550fbc365162f7914cb4410118207118005c7 /arch/arm/mach-imx/mach-imx6q.c
parent3f75978b3742157853618c5c6dd4a5f49aa950b1 (diff)
ARM: imx: add a common function to initialize revision from anatop
The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6q.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c25
1 files changed, 1 insertions, 24 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index f260aad9850b..1bdd0be429b9 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -38,29 +38,6 @@
#include "cpuidle.h"
#include "hardware.h"
-static void __init imx6q_init_revision(void)
-{
- u32 rev = imx_anatop_get_digprog();
- u32 chip_revision;
-
- switch (rev & 0xff) {
- case 0:
- chip_revision = IMX_CHIP_REVISION_1_0;
- break;
- case 1:
- chip_revision = IMX_CHIP_REVISION_1_1;
- break;
- case 2:
- chip_revision = IMX_CHIP_REVISION_1_2;
- break;
- default:
- chip_revision = IMX_CHIP_REVISION_UNKNOWN;
- }
-
- mxc_set_cpu_type(rev >> 16 & 0xff);
- imx_set_soc_revision(chip_revision);
-}
-
static void imx6q_restart(enum reboot_mode mode, const char *cmd)
{
struct device_node *np;
@@ -282,7 +259,7 @@ static void __init imx6q_map_io(void)
static void __init imx6q_init_irq(void)
{
- imx6q_init_revision();
+ imx_init_revision_from_anatop();
imx_init_l2cache();
imx_src_init();
imx_gpc_init();