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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2015-01-15 15:59:27 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-01-16 18:08:40 +0100
commit4db0ba22da9f4406c292a6a6110eeb2edd12f16a (patch)
tree75afb7f5018a3eaeb7f2328c13d7a43f5247c2fa /arch/arm/mach-at91/pm.c
parenta63ba4114690cad6e71cbcfd187b0ebf20321dfa (diff)
ARM: at91: pm: prepare for multiplatform
Split at91_pm_init() in three variants that are called by the respective SoCs .init_machine. This allows to remove the of_machine_is_compatible() calls and move at91_pm_init() out of arch_initcall() which is required for multiplatform. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
-rw-r--r--arch/arm/mach-at91/pm.c48
1 files changed, 27 insertions, 21 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 71cc845263dc..81f2f12d3cc1 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -266,7 +266,7 @@ put_node:
#endif
-static int __init at91_pm_init(void)
+static void __init at91_pm_init(void)
{
#ifdef CONFIG_AT91_SLOW_CLOCK
at91_pm_sram_init();
@@ -274,29 +274,35 @@ static int __init at91_pm_init(void)
pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
- at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
- at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
-
- if (of_machine_is_compatible("atmel,at91rm9200")) {
- /*
- * AT91RM9200 SDRAM low-power mode cannot be used with
- * self-refresh.
- */
- at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
-
- at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
- AT91RM9200_PMC_UDP;
- at91_pm_data.memctrl = AT91_MEMCTRL_MC;
- } else if (of_machine_is_compatible("atmel,at91sam9g45")) {
- at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP;
- at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
- }
-
if (at91_cpuidle_device.dev.platform_data)
platform_device_register(&at91_cpuidle_device);
suspend_set_ops(&at91_pm_ops);
+}
- return 0;
+void __init at91_rm9200_pm_init(void)
+{
+ /*
+ * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
+ */
+ at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
+
+ at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
+ at91_pm_data.memctrl = AT91_MEMCTRL_MC;
+
+ at91_pm_init();
+}
+
+void __init at91_sam9260_pm_init(void)
+{
+ at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
+ return at91_pm_init();
+}
+
+void __init at91_sam9g45_pm_init(void)
+{
+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
+ at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
+ return at91_pm_init();
}
-arch_initcall(at91_pm_init);