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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-30 19:13:09 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-31 05:27:27 +0900
commitad0561d46476c34b45be636117cb78ada3586dec (patch)
tree093ed20ece22a593e30a1d3f848eab59a9436142 /arch/arm/boot/dts/uniphier-pxs2.dtsi
parent3bdba5ac181a2e9eb76bb7673bb11ab5b9783f63 (diff)
ARM: dts: uniphier: use clock/reset controllers
The UniPhier reset controller driver has been merged. Enable it. Also, replace the fixed-rate clocks with the dedicated clock drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2.dtsi50
1 files changed, 31 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 63c12e8ea029..8789cd518933 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -91,18 +91,6 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
-
- uart_clk: uart_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <88900000>;
- };
-
- i2c_clk: i2c_clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <50000000>;
- };
};
};
@@ -127,7 +115,7 @@
interrupts = <0 41 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 4>;
clock-frequency = <100000>;
};
@@ -140,7 +128,7 @@
interrupts = <0 42 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 5>;
clock-frequency = <100000>;
};
@@ -153,7 +141,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
interrupts = <0 43 4>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 6>;
clock-frequency = <100000>;
};
@@ -166,7 +154,7 @@
interrupts = <0 44 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 7>;
clock-frequency = <100000>;
};
@@ -177,7 +165,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 45 4>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 8>;
clock-frequency = <400000>;
};
@@ -188,7 +176,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 25 4>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 9>;
clock-frequency = <400000>;
};
@@ -199,7 +187,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 26 4>;
- clocks = <&i2c_clk>;
+ clocks = <&peri_clk 10>;
clock-frequency = <400000>;
};
};
@@ -208,6 +196,30 @@
clock-frequency = <25000000>;
};
+&mio_clk {
+ compatible = "socionext,uniphier-pxs2-mio-clock";
+};
+
+&mio_rst {
+ compatible = "socionext,uniphier-pxs2-mio-reset";
+};
+
+&peri_clk {
+ compatible = "socionext,uniphier-pxs2-peri-clock";
+};
+
+&peri_rst {
+ compatible = "socionext,uniphier-pxs2-peri-reset";
+};
+
&pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
};
+
+&sys_clk {
+ compatible = "socionext,uniphier-pxs2-clock";
+};
+
+&sys_rst {
+ compatible = "socionext,uniphier-pxs2-reset";
+};