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author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-10-12 22:21:49 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-10-21 22:43:24 +0200 |
commit | 6ee93e127f52d041342b30c8db485b41abcd5bdd (patch) | |
tree | b9256a2ce5393cd8444ede51cd2f907b4efe7f14 /arch/arm/boot/dts/sun4i-a10.dtsi | |
parent | f5bad43b53cbcd1a017c6df3d1bf2c6412a465bd (diff) |
ARM: sun4i: Add audio PLL
The A10 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun4i-a10.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun4i-a10.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 1f3c51a08113..c8595926a721 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -195,6 +195,15 @@ clock-output-names = "pll1"; }; + pll2: clk@01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-pll2-clk"; + reg = <0x01c20008 0x8>; + clocks = <&osc24M>; + clock-output-names = "pll2-1x", "pll2-2x", + "pll2-4x", "pll2-8x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; |