diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-04-08 22:34:44 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-04-13 21:06:16 -0500 |
| commit | 8e3d9a7c4798f7fdd63f14c0331fcb978b2eafbb (patch) | |
| tree | f02aaa881779060d6e2fb20e30ca613372523bdb /arch/arm/boot/dts/qcom-sdx55.dtsi | |
| parent | 37f0f245f92a1fbb4786762129b7b1f090720a43 (diff) | |
ARM: dts: qcom: sdx55: Add support for APCS block
The APCS block on SDX55 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210408170457.91409-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-sdx55.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 41c90f598359..8112a5283ce2 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -360,6 +360,15 @@ #clock-cells = <0>; }; + apcs: mailbox@17810000 { + compatible = "qcom,sdx55-apcs-gcc", "syscon"; + reg = <0x17810000 0x2000>; + #mbox-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>; + clock-names = "ref", "pll", "aux"; + #clock-cells = <0>; + }; + watchdog@17817000 { compatible = "qcom,apss-wdt-sdx55", "qcom,kpss-wdt"; reg = <0x17817000 0x1000>; |