diff options
author | Geert Uytterhoeven <geert@linux-m68k.org> | 2019-10-25 12:38:43 +0100 |
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committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-10-31 16:58:57 +0000 |
commit | cb73737ea1d27181f5c4bfb1288e97f3e8a4abc7 (patch) | |
tree | 271c76464bcfef75db9efcd37942fd981dc82694 /arch/arm/Kconfig | |
parent | 5b1e58c75d4123d9a8c237d147db01b404e56330 (diff) |
ARM: 8928/1: ARM_ERRATA_775420: Spelling s/date/data/
Caching dates is never a good idea ;-)
Fixes: 7253b85cc62d6ff8 ("ARM: 7541/1: Add ARM ERRATA 775420 workaround")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8a50efb559f3..b7dbeb652cb1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1020,7 +1020,7 @@ config ARM_ERRATA_775420 depends on CPU_V7 help This option enables the workaround for the 775420 Cortex-A9 (r2p2, - r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance + r2p6,r2p8,r2p10,r3p0) erratum. In case a data cache maintenance operation aborts with MMU exception, it might cause the processor to deadlock. This workaround puts DSB before executing ISB if an abort may occur on cache maintenance. |