diff options
| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2019-10-23 15:44:13 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2019-10-28 12:12:31 -0700 |
| commit | 14fa486f5ae3fda7de0d05608f0f829a6e7298ed (patch) | |
| tree | 992e4488c7860da630dbd4bb021e796b85748773 /arch/arc | |
| parent | 3696fc9774c54e0599fe2d85e84211f26eead8b8 (diff) | |
ARC: HAPS: add HIGHMEM memory zone to DTS
This is required as a preparation of merging nSIM and HASP
defonfig and device tree.
As we have HIGHMEM disabled in both HAPS and nSIM defconfigs
this doesn't lead to any functional change.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
| -rw-r--r-- | arch/arc/boot/dts/haps_hs.dts | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/arc/boot/dts/haps_hs.dts b/arch/arc/boot/dts/haps_hs.dts index 11fad2f79056..60d578e2781f 100644 --- a/arch/arc/boot/dts/haps_hs.dts +++ b/arch/arc/boot/dts/haps_hs.dts @@ -9,13 +9,15 @@ / { model = "snps,zebu_hs"; compatible = "snps,zebu_hs"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; interrupt-parent = <&core_intc>; memory { device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 */ + /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ + 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ }; chosen { @@ -31,8 +33,9 @@ #address-cells = <1>; #size-cells = <1>; - /* child and parent address space 1:1 mapped */ - ranges; + /* only perip space at end of low mem accessible + bus addr, parent bus addr, size */ + ranges = <0x80000000 0x0 0x80000000 0x80000000>; core_clk: core_clk { #clock-cells = <0>; |