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| author | Andrea Gelmini <andrea.gelmini@gelma.net> | 2016-05-21 13:45:35 +0200 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2016-05-30 10:07:32 +0530 |
| commit | 2547476a5e4061f6addb88d5fc837d3a950f54c4 (patch) | |
| tree | 714716f146f5b1b5ee3b0afd86e4acd658617e76 /arch/arc/mm/dma.c | |
| parent | 1a695a905c18548062509178b98bc91e67510864 (diff) | |
Fix typos
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm/dma.c')
| -rw-r--r-- | arch/arc/mm/dma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c index 8c8e36fa5659..73d7e4c75b7d 100644 --- a/arch/arc/mm/dma.c +++ b/arch/arc/mm/dma.c @@ -10,7 +10,7 @@ * DMA Coherent API Notes * * I/O is inherently non-coherent on ARC. So a coherent DMA buffer is - * implemented by accessintg it using a kernel virtual address, with + * implemented by accessing it using a kernel virtual address, with * Cache bit off in the TLB entry. * * The default DMA address == Phy address which is 0x8000_0000 based. |