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authorVineet Gupta <vgupta@synopsys.com>2020-07-09 19:52:32 -0700
committerVineet Gupta <vgupta@synopsys.com>2020-08-16 21:36:15 -0700
commitfe81d927b78c4f0557836661d32e41ebc957b024 (patch)
tree61ab201793d9ae2155c4ce66bf69969dfc4fe463 /arch/arc/boot/dts/hsdk.dts
parentfeb92d7d3813456c11dce215b3421801a78a8986 (diff)
ARC: HSDK: wireup perf irq
Newer version of HSDK aka HSDK-4xD (with dual issue HS48x4 CPU) wired up the perf interrupt, so enable that in DT. This is OK for old HSDK where this irq is ignored because pct irq is not wired up in hardware. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot/dts/hsdk.dts')
-rw-r--r--arch/arc/boot/dts/hsdk.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index 9acbeba832c0..5d64a5a940ee 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -88,6 +88,8 @@
arcpct: pct {
compatible = "snps,archs-pct";
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <20>;
};
/* TIMER0 with interrupt for clockevent */