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authorChris Packham <chris.packham@alliedtelesis.co.nz>2022-03-23 16:40:54 +1300
committerGuenter Roeck <linux@roeck-us.net>2022-05-22 11:32:31 -0700
commit4fc1b113624784cf1a3b5b1ea813afca2a0b9dcc (patch)
treea43a67fb4425b9d9eb1b373124285b1005a1bb57 /Documentation
parentc8f55be4a1c7b4f64ecac1369e55f366b7f03bd2 (diff)
dt-bindings: hwmon: Document adt7475 pin-function properties
The adt7473, adt7475, adt7476 and adt7490 have pins that can be used for different functions. Add bindings so that it is possible to describe what pin functions are intended by the hardware design. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20220323034056.260455-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/hwmon/adt7475.yaml22
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml
index 7d9c083632b9..22beb37f1bf1 100644
--- a/Documentation/devicetree/bindings/hwmon/adt7475.yaml
+++ b/Documentation/devicetree/bindings/hwmon/adt7475.yaml
@@ -61,6 +61,26 @@ patternProperties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
+ "adi,pin(5|10)-function":
+ description: |
+ Configures the function for pin 5 on the adi,adt7473 and adi,adt7475. Or
+ pin 10 on the adi,adt7476 and adi,adt7490.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - pwm2
+ - smbalert#
+
+ "adi,pin(9|14)-function":
+ description: |
+ Configures the function for pin 9 on the adi,adt7473 and adi,adt7475. Or
+ pin 14 on the adi,adt7476 and adi,adt7490
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - tach4
+ - therm#
+ - smbalert#
+ - gpio
+
required:
- compatible
- reg
@@ -79,6 +99,8 @@ examples:
adi,bypass-attenuator-in0 = <1>;
adi,bypass-attenuator-in1 = <0>;
adi,pwm-active-state = <1 0 1>;
+ adi,pin10-function = "smbalert#";
+ adi,pin14-function = "tach4";
};
};