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authorCristian Birsan <cristian.birsan@microchip.com>2016-01-13 18:15:35 -0700
committerRalf Baechle <ralf@linux-mips.org>2016-01-24 02:52:20 +0100
commitaaa8666ada780e8a4a60870aa4379e5e29e395f3 (patch)
treea96279fec80f9ac5bbe50d11232f3b8adb4ee81d /Documentation
parentedf2194dc9b9b527d003c47051bd4b09b61ddd55 (diff)
IRQCHIP: irq-pic32-evic: Add support for PIC32 interrupt controller
This adds support for the interrupt controller present on PIC32 class devices. It handles all internal and external interrupts. This controller exists outside of the CPU core and is the arbitrator of all interrupts (including interrupts from the CPU itself) before they are presented to the CPU. The following features are supported: - DT properties for EVIC and for devices/peripherals that use interrupt lines - Persistent and non-persistent interrupt handling - irqdomain and generic chip support - Configuration of external interrupt edge polarity Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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