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authorLinus Torvalds <torvalds@linux-foundation.org>2021-11-13 13:07:29 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2021-11-13 13:07:29 -0800
commit3ad7befd4842afa2449026715987122a1c6dcb85 (patch)
tree704d445f8377dc74cacb09615bb7da76e4c6244c /Documentation
parentf44c7dbd74ec1527744e1f673e60265b6f5fd084 (diff)
parent05cf3ec00d460b50088d421fb878a0f83f57e262 (diff)
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull more clk updates from Stephen Boyd: "This is the second batch of clk driver updates that needed a little more time to soak in linux-next. - Use modern i2c probe in vc5 - Cleanup some includes - Update links to datasheets - Add UniPhier NX1 SoC clk support - Fix DT bindings for SiFive FU740 - Revert the module platform driver support for Rockchip because it wasn't actually tested - Fix the composite clk code again as the previous fix had a one line bug that broke rate changes for clks that want to use the same parent still - Use the right table for a divider in ast2600 driver - Get rid of gcc_aggre1_pnoc_ahb_clk in qcom clk driver again because its critical but unused" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clk clk: imx8m: Do not set IMX_COMPOSITE_CORE for non-regular composites clk/ast2600: Fix soc revision for AHB clk: composite: Fix 'switching' to same clock clk: rockchip: drop module parts from rk3399 and rk3568 drivers Revert "clk: rockchip: use module_platform_driver_probe" clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.c dt-bindings: clock: fu740-prci: add reset-cells clk: uniphier: Add SoC-glue clock source selector support for Pro4 dt-bindings: clock: uniphier: Add clock binding for SoC-glue clk: uniphier: Add NX1 clock support dt-bindings: clock: uniphier: Add NX1 clock binding clk: uniphier: Add audio system and video input clock control for PXs3 clk: si5351: Update datasheet references clk: vc5: Use i2c .probe_new clk/actions/owl-factor.c: remove superfluous headers clk: ingenic: Fix bugs with divided dividers
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml4
-rw-r--r--Documentation/devicetree/bindings/clock/silabs,si5351.txt2
-rw-r--r--Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml6
3 files changed, 11 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml
index e17143cac316..252085a0cf65 100644
--- a/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml
+++ b/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml
@@ -42,6 +42,9 @@ properties:
"#clock-cells":
const: 1
+ "#reset-cells":
+ const: 1
+
required:
- compatible
- reg
@@ -57,4 +60,5 @@ examples:
reg = <0x10000000 0x1000>;
clocks = <&hfclk>, <&rtcclk>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
diff --git a/Documentation/devicetree/bindings/clock/silabs,si5351.txt b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
index 8fe6f80afade..bfda6af76bee 100644
--- a/Documentation/devicetree/bindings/clock/silabs,si5351.txt
+++ b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
@@ -2,7 +2,7 @@ Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
Reference
[1] Si5351A/B/C Data Sheet
- https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351.pdf
+ https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
The Si5351a/b/c are programmable i2c clock generators with up to 8 output
clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml
index c3930edc410f..9a0cc7341630 100644
--- a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml
@@ -23,6 +23,7 @@ properties:
- socionext,uniphier-ld11-clock
- socionext,uniphier-ld20-clock
- socionext,uniphier-pxs3-clock
+ - socionext,uniphier-nx1-clock
- description: Media I/O (MIO) clock, SD clock
enum:
- socionext,uniphier-ld4-mio-clock
@@ -33,6 +34,7 @@ properties:
- socionext,uniphier-ld11-mio-clock
- socionext,uniphier-ld20-sd-clock
- socionext,uniphier-pxs3-sd-clock
+ - socionext,uniphier-nx1-sd-clock
- description: Peripheral clock
enum:
- socionext,uniphier-ld4-peri-clock
@@ -43,6 +45,10 @@ properties:
- socionext,uniphier-ld11-peri-clock
- socionext,uniphier-ld20-peri-clock
- socionext,uniphier-pxs3-peri-clock
+ - socionext,uniphier-nx1-peri-clock
+ - description: SoC-glue clock
+ enum:
+ - socionext,uniphier-pro4-sg-clock
"#clock-cells":
const: 1