diff options
author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-01-17 04:31:13 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2021-02-24 14:38:38 -0600 |
commit | c9f04600026f5ea6bbcfd7b06da265604946efd0 (patch) | |
tree | cb1f673336e5cce0f17dd53e484e189691d69fc0 /Documentation | |
parent | 7c53f6b671f4aba70ff15e1b05148b10d58c2837 (diff) |
dt-bindings: PCI: qcom: Document ddrss_sf_tbu clock for sm8250
On SM8250 additional clock is required for PCIe devices to access NOC.
Document this requirement in devicetree bindings.
Link: https://lore.kernel.org/r/20210117013114.441973-2-dmitry.baryshkov@linaro.org
Fixes: 458168247ccc ("dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie.txt | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 3b55310390a0..0da458a051b6 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -132,8 +132,20 @@ - "master_bus" AXI Master clock - "slave_bus" AXI Slave clock --clock-names: - Usage: required for sdm845 and sm8250 +- clock-names: + Usage: required for sdm845 + Value type: <stringlist> + Definition: Should contain the following entries + - "aux" Auxiliary clock + - "cfg" Configuration clock + - "bus_master" Master AXI clock + - "bus_slave" Slave AXI clock + - "slave_q2a" Slave Q2A clock + - "tbu" PCIe TBU clock + - "pipe" PIPE clock + +- clock-names: + Usage: required for sm8250 Value type: <stringlist> Definition: Should contain the following entries - "aux" Auxiliary clock @@ -142,6 +154,7 @@ - "bus_slave" Slave AXI clock - "slave_q2a" Slave Q2A clock - "tbu" PCIe TBU clock + - "ddrss_sf_tbu" PCIe SF TBU clock - "pipe" PIPE clock - resets: |