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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:26 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:15 +0100
commit678d536bb454e3bbedcaa68208550ac9dc1cc066 (patch)
tree00fa9b6d385e7cefbd2d84dbbb905487715ba76a /Documentation/x86
parentd2b240d3d31c66df4d2da54c75ff8e27a0e006c3 (diff)
iio: dac: ad5449: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: 8341dc04dfb3 ("iio:dac: Add support for the ad5449") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-47-jic23@kernel.org
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