diff options
| author | Christoph Hellwig <hch@lst.de> | 2022-01-31 19:36:37 +0100 |
|---|---|---|
| committer | Alexei Starovoitov <ast@kernel.org> | 2022-02-03 09:29:37 -0800 |
| commit | 5ca15b8a939ff59f3e9f957ad4af5658c016cf7e (patch) | |
| tree | 873e03d024bd953dda7b3790279d1785cd4d54ce /Documentation/bpf/instruction-set.rst | |
| parent | 15175336270a76695412aedf68f3eab746d84b4b (diff) | |
bpf, docs: Better document the extended instruction format
In addition to the normal 64-bit instruction encoding, eBPF also has
a single instruction that uses a second 64-bit bits for a second
immediate value. Instead of only documenting this format deep down
in the document mention it in the instruction encoding section.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20220131183638.3934982-5-hch@lst.de
Diffstat (limited to 'Documentation/bpf/instruction-set.rst')
| -rw-r--r-- | Documentation/bpf/instruction-set.rst | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index 94682e23cd2f..a8e9fced39ad 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -22,7 +22,13 @@ necessary across calls. Instruction encoding ==================== -eBPF uses 64-bit instructions with the following encoding: +eBPF has two instruction encodings: + + * the basic instruction encoding, which uses 64 bits to encode an instruction + * the wide instruction encoding, which appends a second 64-bit immediate value + (imm64) after the basic instruction for a total of 128 bits. + +The basic instruction encoding looks as follows: ============= ======= =============== ==================== ============ 32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB) @@ -212,7 +218,7 @@ The mode modifier is one of: ============= ===== ==================================== mode modifier value description ============= ===== ==================================== - BPF_IMM 0x00 used for 64-bit mov + BPF_IMM 0x00 64-bit immediate instructions BPF_ABS 0x20 legacy BPF packet access (absolute) BPF_IND 0x40 legacy BPF packet access (indirect) BPF_MEM 0x60 regular load and store operations @@ -287,12 +293,18 @@ You may encounter ``BPF_XADD`` - this is a legacy name for ``BPF_ATOMIC``, referring to the exclusive-add operation encoded when the immediate field is zero. -16-byte instructions --------------------- +64-bit immediate instructions +----------------------------- + +Instructions with the ``BPF_IMM`` mode modifier use the wide instruction +encoding for an extra imm64 value. + +There is currently only one such instruction. + +``BPF_LD | BPF_DW | BPF_IMM`` means:: + + dst_reg = imm64 -eBPF has one 16-byte instruction: ``BPF_LD | BPF_DW | BPF_IMM`` which consists -of two consecutive ``struct bpf_insn`` 8-byte blocks and interpreted as single -instruction that loads 64-bit immediate value into a dst_reg. Legacy BPF Packet access instructions ------------------------------------- |